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May 12, 2010
 
IDT Confidential
TS Write Operations
Writing to the TSE2002B3C Temperature Register Set is accomplished through a modified block write operation for two (2) data bytes. To maintain
I
2
C compatibility, the 16 bit register is accessed through a pointer register, requiring the write sequence to include an address pointer in addition to the
Slave address. This indicates the storage location for the next two bytes received. The next figure shows an entire write transaction on the bus.
TS Register Write Operation
TS Read Operations
Reading data from the TS may be accomplished in one of two ways:
1. If the location latched in the Pointer Register is correct (for normal operation it is expected the same address will be read repeatedly for temper-
ature), the read sequence may consist of a Slave Address from the bus master followed by two bytes of data from the device; or
2. The pointer register is loaded with the correct register address, and the data is read. The sequence to preset the pointer register is shown in the
I
2
C Write to Pointer Register figure, and the preset pointer read is shown in the I
2
C Preset Pointer Register Word Read figure. If it is desired to read
random address each cycle, the complete Pointer Write, Word Read sequence is shown in the I
2
C Pointer Write Register Word Read figure.
The data byte has the most significant bit first. At the end of a read, this device can accept either Acknowledge (Ack) or No Acknowledge (No Ack)
from the Master (No Acknowledge is typically used as a signal for the slave that the Master has read its last byte).
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